DC coupling

[Hellhammer]

Trying to figure out how to choose Ra and Rk for a dc coupled ECC82 stage. If I have 130V on the grid, 300V HT and want to bias it cold, lets say at -8V, how do I go about designing this stage? I've been trying to draw load lines for different values of Ra+Rk, but it just won't add up. I'm missing something. Cheers.

[Hellhammer]

OK I think I figured it out. If I approach it from a different angle it makes sense. I have 170Va-k at my disposal so I start by drawing load lines from this point.

If i pick 15k for the anode resistor and want the cathode at 138V i read the -8 grid and 15k(blue) anode lines crossing at 1.5mA.

The cathode resistor should be:
138/0.0015=92k.

82k is a close enough standard value. I can now draw a load line for Ra+Rk=97k(pink)

Drawing a cathode load line for 82k(orange) shows that bias will be close to -8V.

Drew load lines for 10k anode and 68k cathode resistors as well.

Is this correct?

[tubeswell]

You need to draw a tube chart for a CF. (The grid voltage lines should be virtually vertical. See Merlin Blencowe's 1st book Ch 5.)

For a DC-coupled pair using a 12AU7 with an HT of 300V, I would use say 22k 2W (keeping both 1st-Ra and CF-Rk the same) and bias the inverting stg for around 6-7V. You probably also need to elevate the heaters to around 50V.

[Firestorm]

Actually, in Merlin's book, this exact scenario is in Chapter Two.

[Hellhammer]

I'm not trying to do a CF.

Yes I've read that part of chapter two in Merlins great book a hundred times but I'm still not sure how to bias it cold so I reach cutoff way before grid current limiting. I didn't do it right I guess?

[tubeswell]

Sorry I see now. Do you want the second stage for an inverter (since you haven't included a bypass cap for that 2nd Rk?)?

You could try level shifting (i.e.: still DC-coupled).

[Hellhammer]

I left the bypass caps out just for clarity. Just a normal gain stage... or not so much gain as distortion!

I might have to do some levelshifting to get the signal down as well. I just want to get the theory to make sense first. So are my calculations off?

[Firestorm]

I think Merlin's approach is a bit trial and error: start with a minimum Rk value based on estimated current; pick a value for Ra; then draw your DC load line as you have done. Then draw the cathode load line and see if it crosses where you want. If not, change values. I can't remember if programs like TubeCAD do this for you, but that would be easier.

[tubeswell]

The bigger the divider in the level shift, then the more gain you will be able to get out of the second stage (because you will be able to use a lower Rk and get the plate to cathode voltage in V2 bigger). However as the level shift increases (i.e.; the more voltage dropped at the voltage divider output), then the more likely you will have to bypass the upper leg of the voltage divider with a cap to keep the high frequencies. So its really about picking a bias point for the V2 stage and then making the level shift output about 6-8V lower than that (for a 12AU7).

[Hellhammer]

I appreciate your replies guys, I really do! But one question is still unanswered. Are my calculations wrong?

I drew bigger lines just for clarity.

[Firestorm]

It seems legit as far as I can see, but I'm a little confused by your initial assumptions -- that you want the tube to hard clip from cut-off versus soft clip from grid current limiting. Why not just use a transistor

If you really need -8V bias point, it forces the large Rk, and in turn a fairly small Ra. So to get reasonable gain, you'll need a really big cathode bypass cap. Even then, I think gain is only about 11 (which may be fine for your purposes).

[Hellhammer]

Thank you! I'll have gain stages enough for plenty gain. I'm not sure if I want cutoff or grid current limiting but I'm gonna experiment with both and maybe have the bias point switchable in the end.